Functional Description

The synchronization signal is obtained via a high-ohmic resistance from the line voltage(voltage V5 ). A zero voltage detector evaluates the zero passages and transfers them to the synchronization register.This synchronization register controls a ramp generator, the capacitor C10 of which is charged by a constant current (determined by R9 ). If the ramp voltage V10 exceeds the control voltageV11 (triggering angle j), a signal is processed to the logic. Dependent on the magnitude of the control voltage V11 , the triggering angle j can be shifted within a phase angle of 0 to 180. For every half wave, a positive pulse of approx. 30 ms duration appears at the outputs Q 1 and Q 2. The pulse duration can be prolonged up to 180 via a capacitor C12 . If pin 12 is connected to ground, pulses with a duration between j and 180 will result.Outputs and supply the inverse signals of Q 1 and Q 2.A signal of j +180 which can be used for controlling an external logic,is available at pin 3. A signal which corresponds to the NOR link of Q 1 and Q 2 is available at output Q Z (pin 7).The inhibit input can be used to disable outputs Q1, Q2 and , .Pin 13 can be used to extend the outputs and to full pulse length (180  j).Q 1 Q 2 Q 1 Q 2 Q 1 Q 2

A phase control with a directly controlled triac is shown in the figure. The triggering angle of the triac can be adjusted continuously between 0 and 180 with the aid of an external potentiometer. During the positive half-wave of the line voltage, the triac receives a positive gate pulse from the IC output pin 15. During the negative half-wave, it also receives a positivetrigger pulse from pin 14. The trigger pulse width is approx. 100 ms.

Triac Control for up to 50 mA Gate Trigger Current